1. Field of the Invention
This invention relates to bipolar transistor (HBT) made of group III-V compound semiconductor materials and a method for manufacturing the HBT.
2. Related Prior Art
A hetero-junction bipolar transistor (HBT) is going to be used as an amplifying device for a transceiver in a high-speed and a high capacity optical communication because of a high current gain and an excellent high frequency performance inherently provided in the HBT. In the HBT, since an emitter layer has a band gap greater than that of a base layer, the emitter injection efficiency of electrons into the base region can be kept high even if the base layer is heavily doped, which results in a superior performance of the HBT at high frequency region.
However, various problems should be solved for the further improvement of the high frequency performance. One of the subjects to be solved is an intrinsic capacitance between the base and the emitter, which operates as a feedback capacitance, hence degrading the high frequency performance of the HBT. One structure for reducing the base-collector capacitance is that the HBT has a heavily doped sub-collector layer contacting to the collector layer, on the other hand, the collector layer is lightly doped. In the case that the HBT has the sub-collector layer, the collector electrode can be formed on the sub-collector layer, which enables to reduce not only the contact resistance of the collector electrode but the base-collector capacitance. Since a thickness of the sub-collector layer is set to be about 500 nm to reduce the collector resistance, a comparatively great step is formed at the edge of the sub-collector layer. A wiring metal to contact to the collector electrode must be formed so as to traverse such great step, which causes a breaking of the wiring metal.
Moreover, the HBT formed on an InP substrate, the sub-collector layer is typically made of InGaAs and formed by etching a semiconductor film epitaxially grown on the substrate with an etchant of a mixture of phosphoric acid, hydrogen peroxide and water. However, this etchant forms a side surface of InGaAs into a reverse trapezoid due to an inherent characteristic of the semiconductor. When the wiring metal traverses such side surface with an acute angle to the substrate, a possibility of breaking the wiring metal will increase.
One subject of the present invention is to provide a manufacturing method for reducing the occurrence of the breaking of the wiring metal traversing the great step formed at the edge of the sub-collector layer. Another subject of the present invention is to provide an HBT with an improved structure.
According to a method for producing an HBT of the present invention comprises the steps of: a) sequentially forming a sub-collector film and a series of semiconductor films on a semiconductor substrate, b) a forming a collector mesa made of the series of semiconductor films on the sub-collector film, c) forming a etching film for covering the collector mesa, and d) etching the sub-collector film by using the etching film as an etching mask. The collector mesa contains a collector layer, a base layer and an emitter layer, and a band gap energy of the emitter layer is greater than that of the base layer, thereby the collector, the base, the emitter functioning as an hetero-junction bipolar transistor. The etching film contains a first portion, a shape of which is substantially rectangle with a pair of sides extending along a [011] crystal direction, and a plurality of second portions. The respective second portions are demarcated by a plurality of sides, one side contacting to the side along the [011] direction of the first portion.
Since the second portions of the etching film has a plurality of sides, at least one of which extending along a direction normal to the [011] direction, side surfaces of the sub-collector layer formed after the etching has an obtuse angle relative to the substrate, even that the etching is performed by an etchant of a mixture of phosphoric acid and hydrogen peroxide. This reduces the breaking of the wiring metal traversing the side along the [011] direction of the sub-collector layer.
The second portions are preferably rectangle, one side of which contacts to the side extending along the [011] direction of the first portion of the etching film, and at least one side of other sides of the second portion extends along a direction across to the [011] direction. The side surfaces contained in such direction across to the [011] direction have an obtuse angle relative to the substrate. Another aspect of the present invention, the second portions of the etching film are preferably trapezoid, a longer side of pair of sides parallel to each other of the trapezoid contacting to the side extending along to the [011] direction of the first portion. Further, the trapezoid of the second portions is preferable to contact to adjoining trapezoid.
The HBT according to the present invention preferably comprises a semiconductor substrate, a sub-collector layer provided on the substrate and a collector mesa provided on the sub-collector layer. The collector mesa contains a collector layer, a base layer and an emitter layer with band gap energy greater than that of the base layer. These layers, from the substrate to the emitter layer, are made of group III-V compound semiconductor materials. The sub-collector layer contains a first portion of substantially rectangle with one of four sides extending along the [011] direction and a plurality of second portions. The respective second portions contacts to the one side extending along the [011] direction of the first portion and protrudes therefrom along the substrate. Since one of side surfaces of the respective second portions has an obtuse angle relative to the substrate, the wiring metal traversing not only the side along the [011] direction of the first portion but the second portions is prevented from the breaking, hence enhancing the reliability of the HBT even that the HBT has the sub-collector layer.
The HBT according to the present invention, the substrate is preferably InP, the sub-collector layer, the collector layer, the base layer are preferably InGaAs lattice matched to InP, and the emitter layer is preferably InP. Further, the emitter layer of the present invention is preferably InAlAs or InGaAsP instead of InP.